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"Somin Shin"

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"Somin Shin"

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Identification of the Break-In Mechanism by Asperity Deformation of CMP Pad
Kyeongwoo Jeong, Seonho Jeong, Somin Shin, Jinuk Choi, Haedo Jeong
J. Korean Soc. Precis. Eng. 2021;38(2):87-95.
Published online February 1, 2021
DOI: https://doi.org/10.7736/JKSPE.020.082
Chemical Mechanical Planarization (CMP) is an essential process for flattening the surface of the wafer to produce a fine structure. The CMP process is performed after a break-in step prior to optimizing the polishing pad. Break-in consists of the conditioning step and warming-up step. In the conditioning step, a conditioner embedded with diamonds is used to remove residues from the pad surface and manages the directionality and height deviation of asperities on the surface. The warming-up step serves to increase the temperature of the pad surface by polishing multiple wafers. The temperature in the warming-up step is raised due to friction between the wafer and pad, and the pad state is divided into a partly warmed up section, a transition section, and a fully warmed up section of the pad. In this study, as the wafer pressure increased in the warm-up stage, the time for the pad to reach the stable section was confirmed, and the break-in mechanism was analyzed in terms of surface characteristics and mechanical properties, such as surface photograph, surface roughness of the pad, and elastic modulus of pad asperities. Based on these results, the break-in mechanism that increases the material removal rate was analyzed.
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Planarization Modeling for Device Pattern with Geometric Characteristics of Pad Asperity
Somin Shin, Dasol Lee, Seonho Jeong, Kyeongwoo Jeong, Jinuk Choi, Haedo Jeong
J. Korean Soc. Precis. Eng. 2020;37(8):567-577.
Published online August 1, 2020
DOI: https://doi.org/10.7736/JKSPE.020.023
Chemical mechanical planarization (CMP) is a semiconductor process which is necessary for multi-layer interconnection structure. CMP pad is a consumable used in the process and with numerous asperities on the surface that wear out by the load applied from the contact with the wafer. Also, it has a patterned wafer, the step height is gradually removed by contact of the asperities with upper and lower layers. The contact state would be different according to the step height reduction. Likewise, depending on the pattern size at the specific step height, the maximum radius of the asperity curvature differs whether it reaches the down area. In this study, the height distribution of asperities was expressed as a function of time and asperity height taking into account the wear of asperities, and based on the Greenwood-Williamson theory, a mathematical model for material removal rate considering pattern size was derived. The consistency of the novel model is verified with the CMP experiment conducted using oxide patterned wafers, and the experimental data were compared with the residual step height using theoretical removal rate. The root mean square error of the step height reduction was 19.84 nm.

Citations

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  • Precision Engineering and Intelligent Technologies for Predictable CMP
    Somin Shin, Hyun Jun Ryu, Sanha Kim, Haedo Jeong, Hyunseop Lee
    International Journal of Precision Engineering and Manufacturing.2025; 26(9): 2121.     CrossRef
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